symbiflow: add systemverilog plugin

This commit is contained in:
Matt Huszagh
2022-05-15 21:35:13 -07:00
parent 2dcb43e59a
commit 5d0452a9ae
@@ -8,25 +8,24 @@
, yosys
, zlib
, yosys-symbiflow
, uhdm
, surelog
}: let
src = fetchFromGitHub {
owner = "SymbiFlow";
repo = "yosys-symbiflow-plugins";
rev = "35c6c33811a8de7c80dff6a7bcf7aa6ec9b21233";
hash = "sha256-g5dX9+R+gWt8e7Bhbbg60O9qa+Vi6Ar0M1sHhYlAre8=";
owner = "chipsalliance";
repo = "yosys-f4pga-plugins";
rev = "aadd1735b2b7af0472e56dc23f1035d6e1904712";
hash = "sha256-gmpEx+8XDN7f+6e/YG25VKgdadwqApPqU3S6OB4AryA=";
};
version = "2022.01.06";
version = "2022.05.13";
# Supported symbiflow plugins.
#
# The following are disabled:
#
# "ql-qlf" builds but fails to load the plugin, so is not currently supported.
#
# "UHDM" doesn't currently build, as the work to package UHDM and surelog has
# not (yet) been undertaken.
plugins = [
"design_introspection"
"fasm"
@@ -36,7 +35,7 @@
# "ql-qlf"
"sdc"
"xdc"
# "UHDM"
"systemverilog"
];
static_gtest = gtest.dev.overrideAttrs (old: {
@@ -51,7 +50,7 @@ in lib.genAttrs plugins (plugin: stdenv.mkDerivation (rec {
enableParallelBuilding = true;
nativeBuildInputs = [ which python3 ];
buildInputs = [ yosys readline zlib ] ;
buildInputs = [ yosys readline zlib uhdm surelog ];
# xdc has an incorrect path to a test which has yet to be patched
doCheck = plugin != "xdc";
@@ -102,5 +101,3 @@ in lib.genAttrs plugins (plugin: stdenv.mkDerivation (rec {
maintainers = with maintainers; [ ollieB thoughtpolice ];
};
}))