{nss,nss_latest}: Fix baseline violation on non-ppc64le POWER

AltiVec was standardised in Power ISA v2.03 (POWER5+?).
VSX was first standardised in Power ISA v2.06 (POWER7), and further expanded on in later versions (POWER8,9,...).

The baseline (that I aim for at least) on 32-bit POWER and 64-bit big-endian POWER is older than these ISA versions,
so AltiVec and VSX support may not be present, leading to SIGILLs when using NSS. Disable usage of these extensions
on those targets.

pkgs/development/libraries/nss/generic.nix

@@ -108,6 +108,7 @@ stdenv.mkDerivation rec {
       target = getArch stdenv.hostPlatform;
       target_system = stdenv.hostPlatform.uname.system;
       host = getArch stdenv.buildPlatform;
+      targetIsPpc64le = stdenv.hostPlatform.isPower64 && stdenv.hostPlatform.isLittleEndian;
 
       buildFlags = [
         "-v"
@@ -127,6 +128,10 @@ stdenv.mkDerivation rec {
       ++ lib.optionals (target_system != stdenv.buildPlatform.uname.system) [
         "-DOS=${target_system}"
       ]
+      ++ lib.optionals stdenv.hostPlatform.isPower [
+        "-Ddisable_altivec=${if targetIsPpc64le then "0" else "1"}"
+        "-Ddisable_crypto_vsx=${if targetIsPpc64le then "0" else "1"}"
+      ]
       ++ lib.optionals (!stdenv.buildPlatform.canExecute stdenv.hostPlatform) [
         "--disable-tests"
       ];